top of page

International Publications

  • 2005​

  1. Sug H. Jeong, Myung H. Sunwoo and Seong K. Oh, “Bit manipulation accelerator for communication systems digital signal processor,” EURASIP Journal on Applied Signal Processing, vol. 2005, no. 16, pp. 2655-2663, Sep. 2005.

  2. Byung G. Jo and Myung H. Sunwoo, “New continuous flow mixed radix (CFMR) FFT processor using novel in-place strategy,” IEEE Trans. on Circuits and systems-II, vol.52, no.5, pp.911-919, May 2005.

  3. Jung H. Lee and Myung H. Sunwoo, “Implementation of a wireless multimedia DSP chip for mobile applications,” Journal of VLSI Signal Processing, Kluwer Academic Publisher, vol. 40, pp. 281-287, Apr. 2005.

  4. Jung H. Lee, Sung D. Kim and Myung H. Sunwoo, "ASIP Instructions and Their Hardware Architecture for H.264/AVC", Journal of Semiconductor Technology and Science, vol. 5, no. 4 pp. 69-74 , Dec. 2005.

  5. Suk H. Yoon, Jing H. Moon and Myung H. Sunwoo, “Design of high-quality audio-specific DSP Core,” in Proc. IEEE Workshop on Signal Processing Systems, 2005, pp.509-513.

  6. Jung H. Lee, Sung D. Kim and Myung H. Sunwoo, “ASIP instructions and their hardware architecture for H.264/AVC,” in Proc. IEEE International SoC Conference, 2005, pp. 40-43.

  7. Jeong H. Lee, Jong H. Moon and Myung H. Sunwoo, “Implementation of application-Specific DSP for OFDM Systems,” in Proc. IEEE International Symposium on Antennas and Propagation, 2005, pp.921-924.

  8. Seung P. Hong, Jeong H. Lee and Myung H. Sunwoo, “Application-specific DSP architecture for H.264/AVC,” in Proc. IEEE Commemorative International Technical Conference on Circuits/Systems, Computers and Communications, 2005, pp.21-28.

  9. Young J. Jung, Suk H. Jung and Myung H. Sunwoo, “Reconfigurable coprocessor for communication systems,” in Proc. IEEE Commemorative International Technical Conference on Circuits/Systems, Computers and Communications, 2005, pp. 515-516.

  10. Sung D. Kim, Jeong H. Lee, Jung M. Yang, Myung H. Sunwoo and Seong K. Oh, “Novel instructions and their hardware architecture for video signal processing,” in Proc. IEEE International Symposium on Circuits and Systems, 2005, pp. 3323-3326.

  11. Suk. H. Yoon, Jong H. Moon and Myung H. Sunwoo, “Efficient DSP architecture for high-quality audio algorithms,” in Proc. IEEE International Symposium on Circuits and Systems, 2005, pp. 2947-2950.

  12. Jae H. Baek, Ju H. Hong and Myung H. Sunwoo, “Novel digital signal processing unit for Ethernet receiver,” in Proc. IEEE International Symposium on Circuits and Systems, 2005, pp.4477-4480.

  13. Jae. H. Baek, Jung H. Lee, Suk H. Yun and Myung H. Sunwoo, “SoC IP design for communications and multimedia,” in Proc. Emerging Information Technology Conference, 2005, pp.1~2.

  14. Jae. H. Baek, Jung H. Lee, Suk H. Yun and Myung H. Sunwoo, “SoC IP design for communications and multimedia,” in Proc. US-Korean Conference on Science, 2005, pp.1~2.

  15. Jeong H. Lee, Myung H. Sunwoo and Seong K. Oh, “Implementation of application-specific signal processor for high-speed OFDM Systems,” in Proc. IEEE Symposium on Low-Power and High-Speed Chips, 2005, pp.329-338.

  16. Myung H. Sunwoo, “SoC IP design for multimedia and communications,” in Proc. IEEE Workshop on Embedded Systems, 2005, pp.1-2.

  • 2004

  1. Jeong H. Lee, Weon H. Park, Jong H. Moon and Myung H. Sunwoo, "Efficient DSP Architecture for Viterbi Decoding with Small Trace Back Latency", Asia Pacific Conference on Circuits and Systems, Dec. 2004.

  2. Sung D. Kim, Sug H. Jung, Myung H. Sunwoo and Seong K. Oh, "Design of Common Structures for CDMA Systems", Asia Pacific Conference on Circuits and Systems, Dec. 2004.

  3. Ji Y. Kim and Myung H. Sunwoo, "Design of Address Generation Unit for Audio DSP", International Symposium on Intelligent Signal Processing and Communication Systems, Nov. 2004.

  4. Jeong H. Lee, Kyung R. Heo, and Myung H. Sunwoo, "Implementation of Application-Specific Signal Processor for High-Speed Communication Systems", International Symposium on Intelligent Signal Processing and Communication Systems, Nov. 2004.

  5. Jong H. Moon and Myung H. Sunwoo, "Efficient DSP Core Architecture for High-Quality Audio Algorithms", International SoC Conference, Oct. 2004.

  6. Jae H. Baek, Ju H. Hong, and Myung H. Sunwoo, and Kyung U. Kim, "Efficient Digital Baseline Wander Compensator for Fast Ethernet", International SoC Conference, Oct. 2004.

  7. Chul Y. Jung, Myung H. Sunwoo, and Seong K. Oh, "Design of Reconfigurable Coprocessor for Communication Systems", IEEE Workshop on SIPS, Oct. 2004.

  8. Jae H. Baek, Myung H. Sunwoo, and Seong K. Oh, "Efficient Digital Baseline Wander Algorithm and its Architecture for Fast Ethernet", IEEE Workshop on SIPS, Oct. 2004.

  9. M. I. Lee, S. K. Oh, and M. H. Sunwoo, "An Improved Channel Estimation Scheme Using Polynomial-Fitting and Its Weighted Extension for an MC-CDMA/TDD Uplink System with Pre-equalization", IEEE Vehicular Technology Conference, Sep. 2004.

  10. M. I. Lee, S. K. Oh, and M. H. Sunwoo, "A Multislot-Interleaved Turbo-Coded MC-CDMA/TDD Uplink System with Pre-Equalization Using Polynomial Fitting and Extension for Uplink Channel Estimation",  IEEEE International Symposium on Personal, Indoor and Mobile Radio Communications, Sep. 2004.

  11. S. H. Lim, S. K. Oh and M. H. Sunwoo, "A class of MIMO systems using transmit diversity pre-combining scheme", IEICE Transactions on Communications,vol. E87-B,  no. 8, pp. 2189-2194, Aug. 2004.

  12. Suk Hyun Yoon, Sug Hyun Jeong, and Myung Hoon Sunwoo, " Design of bit manipulation accelerator for communication DSP", IEEE Asia Pacific Conference on ASICs, Jul. 2004.

  13. S. D. Kim, S. H. Jeong, M. H. Sunwoo, K. H. Kim, "Novel bit manipulation unit for communication digital signal processors", IEEE International Symposium on Circuits and Systems, May. 2004.

  14. J. H. Lee, J. H. Moon, K. L. Heo, M. H. Sunwoo, S. K. Oh, "Implementation of application-specific DSP for OFDM systems", IEEE International Symposium on Circuits and Systems, May. 2004.

  15. M. I. Lee, S. K. Oh, and M. H. Sunwoo, “An Effective Multi-slot Interleaving Scheme for a Coded MC-CDMA/TDD Uplink System with Pre-equalization,” WWC 2004, pp.134-138, May 2004.

  16. Myung H. Sunwoo, Seung K. Oh, "A multiplierless 2-D convolver chip for real-time image processing", Journal of VLSI Signal Processing, Kluwer Academic Publisher, vol. 38, no. 1, pp.63-71, Apr. 2004.

  17. Seung K. Oh, Myung H. Sunwoo, " A new OFDM transmission scheme using DFT code multiplexing", IEICE Transactions on Communications, vol. E87-B, no. 3, pp. 760-763, Mar. 2004.

  18. M. I. Lee, S. K. Oh, and M. H. Sunwoo, "Uplink Channel Estimation and Multislot Interleaving for a Coded MC-CDMA/TDD Uplink System with Pre-Equalization", IEEE Asia Pacific Wireless Communications Symposium, IEEE VTS, pp.139-143, Jan. 2004.

  • 2003

  1. Myung H. Sunwoo, Jung H. Lee,  and Jae Sung Lee, “Design of application-specific instructions and hardware accelerator for Reed-Solomon codec,” EURASIP Journal on Applied Signal Processing, no. 13 , pp. 1346-1354, Dec 2003.

  2. Jae S. Lee and Myung H. Sunwoo, “Design of new DSP instructions and their hardware architecture for high-speed FFT, ” Journal of VLSI Signal Processing, vol. 33, no. 3, Mar. 2003.

  3. K. B. Kwon, S. K. Oh and Myung H. Sunwoo, “An OFDM transmission scheme using variable-length group wise orthogonal code multiplexing,” in Proc. IEEE Vehicular Technology Society Conference, 2003, pp.1-4.

  4. Kyung L. Heo, Jae H. Baek, Myung H. Sunwoo, Byung G. Jo, and Byung S. Son, “New in-place strategy for a mixed-radix FFT processor,” in Proc. IEEE International SoC Conference, 2003, pp.81-84.

  5. Weon H. Park, Ju H. Hong, Myung H. Sunwoo, Kyung H. Kim, and Sung K. Oh, “Implementation of high-speed blind channel equalizer for QAM modems,” in Proc. IEEE International SoC Conference, 2003, pp 263-264.

  6. Jin K. Kim, Myung H. Sunwoo and Seong K. Oh, “Performance analysis of an uplink MC-CDMA/TDD system with pre-equalization using enhanced channel estimation,” in Proc. 8th International OFDM-Workshop, 2003, pp.55-59.

  7. Kyung L. Heo, Myung H. Sunwoo and Seong K. Oh, “Implementation of a wireless multimedia DSP chip for mobile applications,” in Proc. Signal Processing Systems, 2003, pp. 51-56.

  8. Jung H. Lee, Sug H. Jung, Myung H. Sunwoo and Seong K. Oh, “Novel DSP architecture for OFDM modem systems,” in Proc. IEEE Workshop on Signal Processing Systems, 2003, pp.286-291.

  9. Weon H. Park, Ju H. Hong, Myung H. Sunwoo and Seong K. Oh, “Design of a high-speed equalizer using error feedback filter for blind channel equalization,” in Proc. International Technical Conference on Circuits/Systems, Computers and Communications , 2003, pp.18-21.

  10. Sug H. Jung, Myung H. Sunwoo and Seong K. Oh, “Reconfigurable hardware structures for multi-mode CDMA systems,” in Proc. International Technical Conference on Circuits/Systems, Computers and Communications , 2003, pp.1-4.

  11. Seong K. Oh K. H. Nam and Myung H. Sunwoo, “Performance analysis of an MC-CDMA/TDD uplink systems with Pre-Equalization in a highly time-varying channel,” in Proc. JWMMC 2003, KICS & IEICE, 2003, pp.55-59.

  12. Kyung L. Heo, Sung M. Cho, Jung H. Lee and Myung H. Sunwoo, “Application-specific DSP architecture for fast Fourier transform,” in Proc. Application-Specific Systems, Architectures, and Processors, 2003, pp.1-9.

  13. Jung H. Lee, Weon H. Park, Ju H. Hong, Myung H. Sunwoo and Kyung H. Kim, “A high-speed blind DFE equalizer using an error feedback filter for QAM modems,” in Proc. International Symposium on Circuits and Systems, 2003, pp.464-467.

  14. Jae H. Baek, Byung S. Son, Byung G. Jo, Myung H. Sunwoo and Seong K. Oh, “A continuous flow mixed-radix FFT architecture with an in-place algorithm,” in Proc. International Symposium on Circuits and Systems, 2003, pp.113-136.

  • 2002

  1. Jae S. Lee, Jung H. Lee, Myung H. Sunwoo, Sang M. Moh and Seong K. Oh, “A DSP architecture for high-speed FFT in OFDM systems,” ETRI Journal, vol. 24, pp. 391-397, Oct. 2002.

  2. Kyung L. Heo, Sung M. Cho, Myung H. Sunwoo, Seong K. Oh, “Design of a high speed OFDM modem system for powerline communications,” in Proc. IEEE Workshop on Signal Processing Systems , 2002, pp. 264-269.

  3. Jae S. Lee Myung H. Sunwoo and Seong K. Oh, “Design of DSP instructions and their hardware architecture for a Reed-Solomon codec,” in Proc. IEEE Workshop on Signal Processing Systems, 2002, pp.103-108.

  4. K. S. Lee, Seong K. Oh and Myung H. Sunwoo, “A new OFDM transmission scheme using orthogonal code multiplexing,” in Proc. WEASS ICASS, 2002, pp.215-222.

  5. Byung S. Son, Byung G. Jo, Myung H. Sunwoo, and Yong S. Kim, “A high-speed FFT processor for OFDM systems,” in Proc. International Symposium on Circuits and Systems, 2002, pp. 281-284.

  6. Jae H. Baek, Jin Y. Kang and Myung H. Sunwoo, “Design of a high-speed Reed-Solomon decoder,” in Proc. International Symposium on Circuits and Systems, 2002, pp. 793-796.

  7. Jung H. Lee, Jae S. Lee, Myung H. Sunwoo, and Kyung H. Kim, “Design of new DSP instructions and their hardware architecture for the Viterbi decoding algorithm,” in Proc. International Symposium on Circuits and Systems, 2002, pp. 561-564.

  8. B. C. Jung, Myung H. Sunwoo and Seong K. Oh, “A new turbo-coded OFDM system using orthogonal code multiplexing,” in Proc. IEEE Vehicular Technology Conference, 2002, pp.1448-1451.

  9. J. K. Kim, Seong K. Oh, S. R. Kim and Myung H. Sunwoo, “Implementation factors of the multi-rate parallel interface canceller for the IMT-2000 3GPP Systems,” in Proc. IEEE Vehicular Technology Conference, 2002, pp. 215-222.

  • 2001

  1. Jae S. Lee, Young S. Jeon, and Myung H. Sunwoo, “Design of new DSP instruction and their hardware architecture for high-speed FFT,” in Proc. Signal Processing Systems, 2001, pp. 80-90.

  2. Jin Y. Kang, Byung G. Jo, and Myung H. Sunwoo, “Implementation of efficient FIR filter chip for PRML read channel,” in Proc. Signal Processing Systems, 2001, pp. 285-289.

  3. Byung G. Jo, Jin Y. Kang, and Myung H. Sunwoo, “A low power and area efficient FIR filter chip for PRML read channels,” in Proc. International Symposium on Circuits and Systems, 2001, pp. 606-609.

  4. J. K. Kim, Seong K. Oh and Myung H. Sunwoo, “Multi-rate parallel interface canceller for IMT-2000 3GPP systems,” in Proc, IEEE Vehicular Technology Conference, 2001, pp.21-25.

  • 2000

  1. Soo H. Ong and Myung H. Sunwoo, “A morphological filter chip using a modified decoding function,” IEEE Trans. on Circuits and Systems-II: Analog and Digital Signal Processing, vol. 47, no. 9, pp. 876-885, Sep. 2000.

  2. Dae K. Shin, Seung J. Hwang, and Myung H. Sunwoo, “Design of a DFE equalizer ASIC chip for 64/256 QAM modulation,” in Proc. Asia-Pacific Conference on Communications, 2000, pp. 1002-1006.

  3. Dae K. Shin, Seung J. Hwang, and Myung H. Sunwoo, “Design of a DFE equalizer ASIC chip using MMA algorithm,” in Proc. IEEE Workshop on Signal Processing Systems, 2000, pp. 200-209.

  4. Ki H. Park, Dae K. Shin, Jun S. Lee, and Myung H. Sunwoo, “Design of a QPSK/16 QAM LMDS downstream receiver ASIC chip,” in Proc. IEEE Workshop on Signal Processing Systems, Oct. 2000, pp. 210-217.

  5. Dae K. Shin, Ki H. Park, and Myung H. Sunwoo, “A 64/256 QAM receiver chip for high-speed communications,” in Proc. IEEE International ASIC/ SoC Conference, 2000, pp. 214-218.

  6. Dae K. Shin, Ki H. Park, and Myung H. Sunwoo, “A DFE equalizer ASIC chip using the MMA algorithm,” in Proc. IEEE International ASIC/ SoC Conference, 2000, pp. 70-74.

  7. Dae K. Shin, Seung J. Hwang, and Myung H. Sunwoo, “Design of an equalizer using the DFE structure and the MMA algorithm,” in Proc. the Second IEEE Asia Pacific Conference on ASICs, 2000, pp. 195-198.

  8. Ki H. Park, Dae K. Shin, Jun S. Lee, and Myung H. Sunwoo, “A QPSK/16 QAM receiver chip for LMDS application,” in Proc. the Second IEEE Asia Pacific Conference on ASICs, 2000, pp. 207-210.

  9. H. J. Yoo, J. S. Lee and Myung H. Sunwoo, “The MDSP(Multimedia DSP) chip for LMDS applications,” in Proc. IEEE Symposium on Low-Power and High-Speed Chips, 2000,pp. 215-215.

bottom of page