Development of intelligent medical image diagnosis solution, 2020.07~ 2027.12

Development of low power deep learning HW IP design technology for CMOS image sensor image processing, 2020.05~2022.12

Artificial Intelligence Semiconductor Convergence Professional Training Program, 2020.04~2025.12

Investigation of application specific instruction-set processors for machine learning to support mobile visual intelligence, 2017.03~2020.02

Development of Ultra-small-sized Diagnositc Smart Devices, 2016.06.01~2019.12.31

Design of Core Algorithms and IPs of Communication Signal Processing for Portable Medical Device Systems, 2016.04.01~2019.03.31

Employing tamper detection and security enhanced smart Metering SoC for remote power Measurement, 2015.12.01~2017.11.30

Integrated SoC for Controlling Lightweight Mobility Robot Vehicles, 2015.06~2017.05

Design of application specific instruction-set processors for future immersive media, 2014.05~2017.04

Development of Core IPs of OFDM PHY and RF Transceiver for 60GHz Wireless LAN/PAN in application of 7Gbps Wireless Multimedia Services, 2012.12~2015.11

Development of high performance and low power application specific instruction-set processors for next generation multimedia standards, 2011.05~2014.04

Information devices for chip design and implementation of analog and error correction, 2012.05~2012.12

Advanced Low Power and Low Complexity Error Correction Codes for Flash Memory Devices: From Theory to Implementation, 2011.09~2013.09

Design of VCM received signal processing structure based on DVB-S2, 2011.08~2012.01

Implementation of high toughness receiver for satellite broadcast reception, 2010.05~2012.06.

Development of ASIP processor for various motion estimation algorithms, 2009.09~2011.06.

Implementation reciever for improving performance of DVB-S2 system, 2009.07-2011.06.

High speed digital signal processing based on CMOS circuit design for next-generation optical communications, 2009.03-2011.02.

Development of low power multimedia codec IP, 2008.09~2009.08.

Implementation of VCM/ACM synchronizer based on DVB-S2, 2008.07-2010.02.

Development of algorithms of multi-dimension, modulation and demodulation and protocol for transmitting real-time multimedia contents, 2008.07-2009.01.

Development of motion estimation and compensation IP, 2007.09-2008.08.

Development of reverse link demodulator, 2007.07-2008.06.

Research of a new generation technology of channel codec for scale-free uPAN system, 2007.04-2007.12.

Communication system cross-layer optimization and design technologies, Brain Korea(BK) 21, 2006.03-2013.02.

Development of MC IP for integrated decoder and implementation of syntax process, 2006.04-2007.11.

Design of Reed-Solomon decoder, 2006.04-2007.02.

Design of DVB-S2 synchronizer, 2005.07-2005.12.

Development of H.264 codec for mobile units, 2004.04-2006.02.

Design VLSI of DTV equalizer of E-xVS estimating channel method, 2004.08-2004.12.

Development of H/W platforms for intelligent multi-modal uID systems, 2003. 10 - 2006. 3.

Design of real-time SoC for multimedia processing, 2003.09-2005.08.

Application specific DSP core design for wire/wireless multimedia communications, 2001. 7 - 2006. 6.

Development of lifelike media processing SoC, 2003. 8 - 2007. 6.

Platform based system architecture design, 2003. 4 - 2004. 3.

Development of 100 base-TX PHY core devices, 2002. 10 - 2003. 9.

SDR (Software Defined Radio) technology research, 2002. 8 -2003.7.

Design of OFDM modem for wireless multimedia terminal, 2001. 7 - 2003. 6.

Investigation of DSP architectures for multi-mode/media, 2002. 3 - 2003. 2.

Design of AS-SP (Application Specific - Signal Processor) architecture, 2001. 12 - 2003. 10.

Software download of open architecture SDR base station, 2001. 7 - 2002. 2.

Design of a core for GSM/GPRS modems, 2000. 11 - 2001. 10.