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 Research Project                        Before 2000

  1. Wireless ATM technology, 1997. 9 - 2002. 8.

  2. Development of a 10M bps power line carrier modem ASIC, 1999. 12 - 2001. 9.

  3. ASIC chip design for multimedia education player, 2000. 3 - 2001. 2.

  4. Implementation of data error minimization techniques in the satellite CDMA, 1998. 1 - 2000. 12.

  5. Design of a high performance fixed-point multimedia DSP core chip, 1995. 12 - 2000. 7.

  6. Development of a high speed asymmetric data transmission modem using CATV network, 1998. 1 - 1999. 12.

  7. Implementation of an LMDS wireless communication chip set, 1997. 10 - 1999. 9.

  8. ASIC Design of a power line carrier modem chip, 1997. 8 - 1999. 8.

  9. Design of an efficient real-time DCT architecture, 1998. 6 - 1999. 5.

  10. High-speed RAKE receiver architectures for wireless mobile communications, 1997. 3 - 1999. 2.

  11. Development of a graphic accelerator chip, 1996. 5 - 1998. 12.

  12. Implementation of a MODEM ASIC chip for wireless multimedia applications, 1995. 11 - 1997. 11.

  13. Development of a high-speed FIR filter ASIC chip for 1-D and 2-D signal processing, 1995. 3 - 1997. 2.

  14. Implementation of a parallel image processor chip, 1993. 12 - 1996. 11.

  15. Design of a SIMD parallel architecture for satellite imagery, 1993. 4 - 1995. 12.

  16. Architecture design of an image processor ASIC chip, 1993. 3 - 1995. 12.

  17. DSP chip design for mobile cellular phone, 1992. 8 - 1995.7.

  18. Behavior scenario for CDMA interface standard (IS-95) and SDL documentation, 1994. 10 - 1995. 6.

  19. The proposed standard for CDMA wireless digital cellular interface, 1994. 3 - 1994. 8.

  20. Design of parallel image processor for testing PCB, 1993.12-1994.11.

  21. Design parallel processing ASIC architecture for image processing reducing communication overhead, 1993.03-1994.02.

  22. VHDL implementation for audio codec VSELP for mobile communication and research of ASIC architecture, 1993.03-1994.09.

  23. VHDL implementation of key algorithms in VSELP for ASIC architecture, 1993. 3 - 1993. 9.

  24. Design of a Motorola DSP chip for digital cellular, 1990. 8 - 1992. 8.

  25. Development of mobile cellular systems, 1990. 8 - 1992. 8.

  26. Implementation of an array processor, 1987. 9 - 1990. 8.

  27. Implementation of parallel processing computers, 1986. 9 - 1990. 8.

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